WILSONVILLE, Ore., March 16, 2015 /PRNewswire/ --
HyperLynx Product Highlights
- New HyperLynx® Signal Integrity/Power Integrity (SI/PI) adds
power-aware SI simulation capabilities to ensure accurate modeling
and signal performance of high-speed parallel links such as DDR3
and DDR4.
- Power-Aware IBIS v5.0 modeling ensures accurate simulation of
simultaneous switching noise (SSN) and power effects of timing and
signal integrity.
- DDRx Wizard supports the latest JEDEC standards to verify all
DDR and LPDDR memory types including the next-generation DDR4 and
LPDDR4.
- In a joint correlation study with Mentor Graphics, Micron and
Socionext (on March 1, 2015,
the System LSI businesses of Fujitsu Semiconductor Limited and
Panasonic Corporation were consolidated and transferred to
Socionext Inc.), the HyperLynx product achieved a 95 percent
reduction in time over transistor-level simulation with excellent
correlation.
- Integrated S-parameter extraction and simulation provides
excellent accuracy and 5-10X faster performance than any other
industry method.
- High-performance DC drop/thermal co-simulation predicts voltage
drop, high current areas, and resulting temperature changes with
performance orders of magnitude faster than competitive
solutions.
Download the DDR4 correlation whitepaper at
http://go.mentor.com/DDR4-Board-Design. This was originally
presented and nominated for best paper at DesignCon2015.
For more information on the new HyperLynx SI/PI product for
high-speed PCB designs, go to:
http://www.mentor.com/pcb/hyperlynx/
Mentor Graphics Corporation (NASDAQ: MENT) today
announced its newest version of the HyperLynx® Signal
Integrity/Power Integrity (SI/PI) product for high-speed printed
circuit board (PCB) designs. The HyperLynx product addresses
high-speed systems design problems throughout the design
flow—starting at the earliest architectural stages through
post-layout verification. With the increased complexity and
high-speed performance of today's integrated circuits (ICs), a
growing number of PCBs suffer from signal degradation and timing
problems which are exacerbated by power delivery issues; this
impacts board performance and possibly total failed logic,
requiring costly redesign.
The comprehensive HyperLynx SI/PI product provides tools for
pre- and post-layout signal integrity, timing, crosstalk and power
integrity analysis to quickly generate accurate simulation results
to prevent design re-spins. New features in the HyperLynx
SI/PI product include power-aware IBIS model support and the
DDRx wizard for DDR4/LPDDR4 (next-generation memory for
low-power design) validation.
Commentary:
"Socionext is addressing SI/PI issues
that get more complicated at higher frequencies. Over 2Gbps, SSN
(Simultaneous Switching Noise) must be considered when designing
and simulating DDR4 circuits. Socionext is working with its
customers and partners to address this challenge, and we
collaborated with Mentor Graphics to develop a HyperLynx DDR4
simulation kit," stated Takayuki
Tsuru, Director of the Custom SoC Business Unit, SoC Product
Solution Department, Socionext Inc. "With our IBIS5.0
modeling technique and the HyperLynx power-aware SI solution, we
achieved a 95 percent reduction in simulation time with excellent
correlation to transistor-level simulation. The simulation
kit is available for high performance server and storage
applications, and we are also developing a LPDDR4 design kit for
low power mobile devices. We believe our customers and
Socionext will be able to continuously improve design efficiency
and decrease development costs with Mentor Graphics' global
support."
"Our market-leading HyperLynx product continues to serve the
high-speed demands of today's most advanced systems designs,"
stated A.J. Incorvaia, vice
president and general manager of Mentor Graphics Systems Design
Division. "Our new power-aware modeling technology enables our
customers to quickly and accurately simulate complex signaling
protocols, saving them substantial time and cost."
Power –Aware IBIS Modeling
The new HyperLynx tool
supports IBIS [Input/Output Buffer Information Specifications] v5.0
models for ICs that represent non-ideal power effects. This
capability accurately models supply currents, including pre-driver
effects, switching slowdown due to sagging supply voltage, and
better buffer capacitance modeling. Power-aware IBIS modeling
can be used in all simulation types including DDRx analysis, to
study the power effects of timing and signal quality. This
tool can model simultaneous switching noise (SSN), critical for
designing next-generation memory interconnects.
DDRx Wizard Supports Latest JEDEC Standards
Supporting the latest JEDEC standards, the DDRx Wizard
verifies all DDR memory types, including DDR4 and its low-power
(LPDDR4) counterparts. The DDRx Wizard can produce eye
diagrams for complete verification of DDR3 and next-generation DDR4
memory systems. Each individual bit in the simulation is
validated using eye-based metric checks, including integrated
timing analysis for DDRx and LPDDRx.
Additional HyperLynx SI/PI Product Features:
- Back drilling support for the accurate simulation of vias with
appropriate stubs removed; "what-if" scenarios can be quickly
established, and drilling can be enabled or disabled;
- Touchstone Viewer feature calculates ILD, ICR and other metrics
in the IEEE 802.3 Ethernet specification and evaluates differential
crosstalk characteristics for interconnects including S-parameter
model conversion from standard to mixed mode;
- SERDES enhancements to support new IBIS 6.0 features, CTLE
equalization in FastEye Wizard, 128b/130b encoding and
configuration file for batch AMI runs.
Product Availability and Information
The HyperLynx
product family for "power-aware" high-speed design is available
now. Download the new HyperLynx white paper, DDR4 Board
Design and Signal Integrity Verification Challenges,
at http://go.mentor.com/DDR4-Board-Design. For additional product
information, visit:
http://www.mentor.com/pcb/hyperlynx/signal-integrity/.
To accelerate time-to-productivity using the HyperLynx tool,
visit the HyperLynx Alliance, a cloud-based learning center which
includes free virtual labs. The virtual lab series leverages
partner models and reference designs with the HyperLynx tools to
demonstrate ideal design methodologies that address difficult
high-speed printed circuit board (PCB) SerDes and DDR design
challenges.
For more information, contact:
Larry Toda
Mentor Graphics
503.685.1664
larry_toda@mentor.com
About Mentor Graphics
Mentor Graphics Corporation
(NASDAQ: MENT) is a world leader in electronic hardware and
software design solutions, providing products, consulting services
and award-winning support for the world's most successful
electronic, semiconductor and systems companies. Established in
1981, the company reported revenues in the last fiscal year in
excess of $1.24 billion. Corporate
headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web
site: http://www.mentor.com/.
(Mentor Graphics and HyperLynx are registered trademarks of
Mentor Graphics Corporation. All other company or product names are
the registered trademarks or trademarks of their respective
owners.)
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SOURCE Mentor Graphics